G4HUP Direct Frequency Synthesiser Documentation - Issue 2 PCBs

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DFS Issue 2 Documentation    

Changes and Updates in Issue 2

There are several improvements and changes in the Issue 2 PCB which are intended to improve the performance and versatility of the G4HUP DFS PCB. Changes to the circuitry are minor, but in some cases significant - check through the items below:

Change to 7K size inductors

All variable inductors in the DFS have been changed to 7K size - there are a couple of reasons for this: A consequence of this change is that there are no transformers in the design now. The circuitry has been modified to use split inductors (one SMD, one variable) in the collector circuit of the multiplier stages, and to make wider use of capacitive taps to connect at the correct impedances.

Change to ADE style SMD mixers

Although the SRA/SBL-1 type mixers of the Issue PCB's are readily available in many constructors junk boxes, the SRA-3 or -8 types that must be used for solutions which have a mixer input signal below 1MHz are not - and are expensive. By changing to the ADE SMD type mixers, there is again a real estate saving, but also the mixers are cheaper - the ADE-1 and the ADE-6 together cost less (to you) than an SRA-8 alone!

Change to D-pak style voltage regulators

One of the 'problems' with the Issue 1 implementation is the use of the TO220 style regulators - the height of these above the PCB meant that you either had the SMA connectors fouling the bottom cover lid edges - or to avoid this you had to shorten the tabs on the regulators - I've had both situations wih those I've built! Using D Pak style 500mA regulators, on the top side of the PCB, this problem is totally eliminated, and has cleared some space on the underside of the PCB.

Use of SMD trimmer capacitor in the crystal filter circuit

A 3mm SMD trim cap is now used in the filter - this has again allowed a real estate saving, and I think these are a better solution mechanically.

Modifications to Logic Section

Two major changes have been made to the logic section - the introduction of a second Schmidtt inverter package, and the separation of the two dividers to allow a synchronous counting configuration to be established when the dividers are operated sequentially. This reduces noise contribution due to jitter in the counters, and should be used whenever possible. Instructions on the configuration of the dividers into a synchronous connection will be found in the version specific notes for versions that use this. The Schmidtt inverter packages have been changed for SOIC types - I would have done the same for the dividers, but I have been unable to source SO versions in the UK!

Improved filtering

In the original implementation, there was only a single stage LC filter in one of the LF multiplier chains - this has been modified so that both multiplier paths (sheet 3 and sheet 9) have two stage LC filters on the ouput.

I also realised that at the output of the MF mixer, there was no opportunity to select a mixer product then multiply it. Again, this has been modified, and there is now a two stage LC filter after the mixer to select the wanted product, and another two stage filter after the amplifier/multiplier, offering the options of either straight amplification with tighter filtering, or multiplication of the mixer output.

Screening and Shielding

One of the outcomes from producing the 124.5MHz Issue 1 version was the recognition of a coupling 'problem' between the two sets of S18 BPF inductors - in this case the 130MHz component was getting into the output signal. Screening of these coils (both sets) is now considered essential, as is the use of an intercoil screen, of non-magnetic material. In each case a top coupling capacitor of 1pF is used, and there is no inductive coupling used at all - this has given a 10 to 15 dB reduction in the level of the unwanted products passing though the BPF, with a very small penalty on the wantd signal.

The lands to enable this screening were part of the original Issue 1 design. Further screening options have been added with Issue 2 - on the PCB topside, you can now screen the logic section - work by Brian, GM8BJF, showed this to be beneficial in some cases. In addition, on the underside of the PCB, there are lands available to allow you to screen the VHF multiplier and its amplifiers as far as the mixer, and also to screen the MF amplifier/multiplier/filter path. Finally, there is a screen land traversing the PCB to allow the end of the box which contains all the output frequency circuitry, including the crystal filter, to be screened off from the rest of the lower frequency stages.

It is not essential to use these screening options - but they are there for experimentation.

General Documentation:

Pi Attenuator resistor values

DFS Issue 2 Filter page - Information on all proven frequency schema and approriate filters

Documentation for Issue 2.0 PCB's:

DFS Logic Divider Config Guide for selecting ratios and setting links correctly

DFS Issue 2 Design Worksheet for developing new DFS implementations

DFS Issue 2 Frequency Calculation worksheet an aid for proving multiplier/divider and mixing products. This example is pre-loaded with the data for the 101.75MHz DFS version, but everything can be overwritten

DFS Issue 2 Technical Manual, including circuit schematics and parts placement diagrams

Click here for Errata and updated information

Notes on different Frequency Schema versions


Page created 18 May 2008

Page last updated 8 Nov 2009